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| VND5160J-E Double channel high side driver for automotive applications Features Max supply voltage Operating voltage range Max on-state resistance Current limitation (typ) Off state supply current (typ) 1. Typical value with all loads connected. VCC VCC RON ILIMH IS 41V 4.5 to 36V 160 m 5A 2 A (1) PowerSSO-12 - Electrostatic discharge protection Application General - Inrush current active management by power limitation - Very low stand-by current - 3.0V CMOS compatible input - Optimized electromagnetic emission - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC European directive Diagnostic functions - Open drain status output - On state open load detection - Off state open load detection - Thermal shutdown indication Protection - Undervoltage shut-down - Overvoltage clamp - Output stuck to Vcc detection - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Thermal shut down - Reverse battery protection (see Figure 28) Device summary All types of resistive, inductive and capacitive loads Description The VND5160J-E is a monolithic device made using STMicroelectronics VIPower M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). The device detects open load condition in both ON and OFF states, when STAT_DIS is left open or driven low. Output shorted to VCC is detected in the OFF state. When STAT_DIS is driven high, the STATUS pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long duration overload, the device limits the dissipated power to safe level up to thermal shut-down intervention. Thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears. Table 1. Order codes Package Part number (Tube) PowerSSO-12 VND5160J-E Part number (Tape & Reel) VND5160JTR-E December 2007 Rev 5 1/31 www.st.com 31 Contents VND5160J-E Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 2.2 2.3 2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20 3.1.1 3.1.2 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 20 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21 3.2 3.3 3.4 3.5 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 PowerSSO-12TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 5.2 5.3 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSSO-12TM package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2/31 VND5160J-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSSO-12TM mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3/31 List of figures VND5160J-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Openload On state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Openload Off state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Turn - On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Turn - Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Maximum turn Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23 PowerSSO-12TM PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 24 PowerSSO-12TM Thermal impedance junction ambient single pulse (one channel ON) . . 25 Thermal fitting model of a double channel HSD in PowerSSO-12TM . . . . . . . . . . . . . . . . . 25 PowerSSO-12TM package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSSO-12TM tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-12TM tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4/31 VND5160J-E Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram VCC OUTPUT1 GND INPUT1 STATUS1 STAT_DIS INPUT2 STATUS2 OPENLOAD ON 1 OVERTEMP. 1 OVERTEMP. 2 OPENLOAD OFF 1 OPENLOAD ON 2 LOGIC PWRLIM1 DRIVER 1 ILIM 1 VDSLIM 1 VCC CLAMP UNDERVOLTAGE CLAMP 1 DRIVER 2 ILIM 2 VDSLIM 2 CLAMP 2 OPENLOAD OFF 2 OUTPUT2 PWRLIM 2 Table 2. Name VCC Pin functions Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/ resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. Open Drain digital diagnostic pin. Active high CMOS compatible pin, to disable the STATUS pin. OUTPUTn GND INPUTn STATUSn STAT_DIS 5/31 Block diagram and pin description Figure 2. Configuration diagram (top view) VND5160J-E TAB = Vcc GND STAT_DIS INPUT 1 STATUS 1 STATUS 2 INPUT 2 1 2 3 4 5 6 12 11 10 9 8 7 Vcc OUTPUT 1 OUTPUT 1 OUTPUT 2 OUTPUT 2 Vcc Table 3. Suggested connections for unused and N.C. pins STATUS X N.R.(1) N.C. X X OUTPUT X N.R. INPUT X Through 10k resistor STAT_DIS X Through 10k resistor Connection / Pin Floating To ground 1. Not recommended. 6/31 VND5160J-E Electrical specifications 2 Electrical specifications Figure 3. Current and voltage conventions IS VCC VFn VCC IOUTn STAT_DIS VSD IINn INPUTn VINn GND IGND OUTPUTn STATUSn ISTATn VOUTn ISD VSTATn Note: VFn = VOUTn - VCCn during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the ratings listed in the "Absolute maximum ratings" tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Symbol VCC -VCC -IGND IOUT -IOUT IIN ISTAT DC supply voltage Reverse DC supply voltage DC reverse ground pin current DC output current Reverse DC output current DC input current DC status current Maximum switching energy (L=12mH; RL=0; Vbat=13.5V; Tjstart=150C; IOUT = IlimL(Typ.) ) Absolute maximum ratings Parameter Value 41 0.3 200 Internally limited 6 +10 / -1 +10 / -1 +10 / -1 33 Unit V V mA A A mA mA mA mJ ISTAT_DIS DC status disable current EMAX 7/31 Electrical specifications Table 4. Symbol VND5160J-E Absolute maximum ratings (continued) Parameter Electrostatic discharge (Human Body Model: R=1.5K; C=100pF) - INPUT - STATUS - STAT_DIS - OUTPUT - VCC Charge device model (CDM-AEC-Q100-011) Junction operating temperature Storage temperature Value Unit VESD 4000 4000 4000 5000 5000 750 -40 to 150 -55 to 150 V V V V V V C C VESD Tj Tstg 2.2 Thermal data Table 5. Symbol Thermal data Parameter Max value 8 See Figure 32 Unit C/W C/W Rthj-case Thermal resistance junction-case (max.) (with one channel ON) Rthj-amb Thermal resistance junction-ambient 8/31 VND5160J-E Electrical specifications 2.3 Electrical characteristics Values specified in this section are for 8V . Power section Parameter Operating supply voltage Undervoltage shutdown Undervoltage Shut-down hysteresis On state resistance(2) IOUT= 1A; Tj= 25C IOUT= 1A; Tj= 150C IOUT= 1A; VCC= 5V; Tj= 25C IS= 20mA Off State; VCC=13V; VIN=VOUT=0 Tj= 25C; On State; VCC=13V; VIN=5V; IOUT= 0A current(2) VIN=VOUT=0V; VCC=13V; Tj=25C VIN=VOUT=0V; VCC=13V; Tj=125C VIN=0V; VOUT=4V Output - VCC diode voltage(2) -IOUT=0.6A; Tj=150C 0 0 -75 41 46 Test conditions Min. Typ. Max. Unit 4.5 13 3.5 0.5 160 320 210 52 36 4.5 V V V m m m V RON Vclamp Clamp voltage IS Supply current 2(1) 3 0.01 5(1) 6 3 5 0 0.7 A mA IL(off1) IL(off2) VF Off state output A V 1. PowerMOS leakage included. 2. For each channel. Table 7. Symbol td(on) td(off) Switching (VCC = 13V; Tj = 25C) Parameter Turn-On delay time Turn-Off delay time Test conditions RL=13 (see Figure 6) RL=13 (see Figure 6) RL=13 RL=13 Min. Typ. Max. Unit 10 15 See Figure 21 See Figure 22 0.07 0.04 s s V/ s V/ s mJ mJ dVOUT/dt(on) Turn-On voltage slope dVOUT/dt(off) Turn-Off voltage slope WON WOFF Switching energy losses during twon RL=13 (see Figure 6) Switching energy losses during twoff RL=13 (see Figure 6) 9/31 Electrical specifications Table 8. Symbol VSTAT ILSTAT CSTAT VSCL VND5160J-E Status pin (VSD=0) Parameter Status low output voltage Status leakage current Status pin input capacitance Status clamp voltage Test conditions ISTAT= 1.6 mA, VSD=0V Normal operation or VSD=5V, VSTAT= 5V Normal operation or VSD=5V, VSTAT= 5V ISTAT= 1mA ISTAT= - 1mA 5.5 -0.7 Min. Typ. Max. Unit 0.5 10 100 7 V A pF V V Table 9. Symbol IlimH IlimL TTSD TR TRS THYST tSDL VDEMAG Protection(1) Parameter DC short circuit current Short circuit current during thermal cycling Shutdown temperature Reset temperature Thermal reset of STATUS Thermal hysteresis (TTSD-TR) Status delay in overload conditions Turn-Off output voltage clamp Output voltage drop limitation Tj>TTSD IOUT=1A; VIN=0; L=20mH IOUT= 0.03A; Tj= -40C...+150C (see Figure 5) Test conditions VCC= 13V 5V TRS + 1 TRS + 5 135 VON 25 mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 10/31 VND5160J-E Table 10. Symbol IOL tDOL(on) Electrical specifications Openload detection Parameter Openload On state detection threshold Openload On state detection delay Test conditions VIN = 5V, 8V Delay between INPUT falling edge and STATUS rising IOUT = 0A (see Figure 4) edge in Openload condition Openload Off state voltage detection threshold Output short circuit to Vcc detection delay at turn Off VIN = 0V, 8V s VOL tDSTKON 2 180 4 tPOL V s Table 11. Symbol VIL IIL VIH IIH VI(hyst) VICL VSDL ISDL VSDH ISDH Logic input Parameter Input low level voltage Low level input current Input high level voltage High level input current Input hysteresis voltage Input clamp voltage STAT_DIS low level voltage Low level STAT_DIS current STAT_DIS high level voltage High level STAT_DIS current VCSD= 2.1V 0.25 ISD= 1mA ISD= -1mA 5.5 -0.7 7 VCSD= 0.9V 1 2.1 10 IIN= 1mA IIN= -1mA VIN= 2.1V 0.25 5.5 -0.7 0.9 7 VIN= 0.9V 1 2.1 10 Test conditions Min. Typ. Max. Unit 0.9 V A V A V V V V A V A V V V VSD(hyst) STAT_DIS hysteresis voltage VSDCL STAT_DIS clamp voltage 11/31 Electrical specifications Figure 4. Status timings VND5160J-E OPEN LOAD STATUS TIMING (without external pull-up) VIN IOUT < IOL VOUT < VOL VIN OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT > VOL VSTAT tDOL(on) tPOL VSTAT tDOL(on) OUTPUT STUCK TO Vcc VIN IOUT > IOL VOUT > VOL VIN OVER TEMP STATUS TIMING Tj > TTSD VSTAT VSTAT tDOL(on) tDSTKON tSDL tSDL Figure 5. Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Iout Von/Ron(T) 12/31 VND5160J-E Table 12. Truth table INPUTn L H L H L H L H L H L H OUTPUTn L H L X L L L L H H L H Electrical specifications Conditions Normal operation Current limitation Overtemperature Undervoltage Output Voltage > VOL Output Current < IOL STATUSn (VSD=0V)(1) H H H H H L X X L(2) H H(3) L 1. If the VSD is high, the STATUS pin is in a high impedance. 2. The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge. 3. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge. Figure 6. Switching characteristics VOUT tWon tWoff 90% dVOUT/dt(off) tr 10% tf t INPUT td(on) td(off) 80% dVOUT/dt(on) t 13/31 Electrical specifications Table 13. ISO 7637-2: 2004(E) test pulse 1 2a 3a 3b 4 5b(2) ISO 7637-2: 2004(E) test pulse 1 2a 3a 3b 4 5b(2) III C C C C C C VND5160J-E Electrical transient requirements Test levels(1) III -75V +37V -100V +75V -6V +65V IV -100V +50V -150V +100V -7V +87V Number of pulses or test times 5000 pulses 5000 pulses 1h 1h 1 pulse 1 pulse Test level results(1) IV C C C C C C Burst cycle/pulse repetition time 0.5 s 0.2 s 90 ms 90 ms 5s 5s 100 ms 100 ms Delays and impedance 2 ms, 10 50 s, 2 0.1 s, 50 0.1 s, 50 100 ms, 0.01 400 ms, 2 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. Class C E Contents All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. 14/31 VND5160J-E Figure 7. Waveforms NORMAL OPERATION INPUT STAT_DIS LOAD CURRENT STATUS UNDERVOLTAGE VCC INPUT STAT_DIS LOAD CURRENT STATUS undefined OPEN LOAD with external pull-up INPUT STAT_DIS LOAD VOLTAGE STATUS OPEN LOAD without external pull-up INPUT STAT_DIS LOAD VOLTAGE LOAD CURRENT STATUS IOUT Electrical specifications RESISTIVE SHORT TO Vcc, NORMAL LOAD INPUT STAT_DIS LOAD VOLTAGE STATUS tDSTKON OVERLOAD OPERATION Tj INPUT STAT_DIS LOAD CURRENT STATUS ILIMH ILIML TR TTSD TRS IOUT>IOL VOUT>VOL VOL current power limitation limitation thermal cycling SHORTED LOAD NORMAL LOAD 15/31 Electrical specifications VND5160J-E 2.4 Figure 8. Iloff1 (uA) Electrical characteristics curves Off state output current Figure 9. Vicl (V) 8 0.25 Input clamp voltage 0.2 Off state Vcc= 13V Vin= Vout= 0V 7.75 I 1mA in= 7.5 7.25 0.15 7 6.75 6.5 0.1 0.05 6.25 0 -50 -25 0 25 50 75 100 125 150 175 6 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) Figure 10. High level input current Iih (uA) 5 4.5 4 3.5 3 2.5 2 1.5 Figure 11. Input high level Vih (V) 4 3.5 3 2.5 2 1.5 1 Vin= 2.1V 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) Figure 12. Input low level Vil (V) 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Figure 13. Input hysteresis voltage Vihyst (V) 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) 16/31 VND5160J-E Electrical specifications Figure 14. Status low output voltage Vstat (V) 0.9 0.8 Figure 15. Status leakage current Ilstat (uA) 0.08 I stat= 1.6mA 0.7 0.072 Vstat= 5V 0.064 0.6 0.5 0.4 0.3 0.04 0.2 0.1 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 0.032 0.056 0.048 Tc (C ) Tc (C ) Figure 16. Status clamp voltage Vscl (V) 9 8.5 8 7.5 7 6.5 6 5.5 5 4.5 4 -50 -25 0 25 50 75 100 125 150 175 Figure 17. On state resistance vs Tcase Ron (mOhm) 300 270 I stat= 1mA 240 210 180 150 120 90 60 30 0 -50 -25 I out= 1A Vcc= 13V 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) Figure 18. On state resistance vs VCC Ron (mOhm) 300 275 250 225 200 175 150 125 100 75 50 0 5 10 15 20 25 30 35 40 Figure 19. Openload On state detection threshold Iol (mA) 100 Tc= 150C Tc= 125C 90 80 70 60 50 Vin= 5V Tc= 25C 40 30 Tc= -40C 20 10 0 -50 -25 0 25 50 75 100 125 150 175 Vcc (V) Tc (C ) 17/31 Electrical specifications VND5160J-E Figure 20. Openload Off state voltage detection threshold Vol (V) 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Figure 21. Turn - On voltage slope dVout/dt(on) (V/ms) 1000 900 Vin= 0V 800 700 600 500 400 300 200 100 0 -50 Vcc= 13V Ri= 6.5Ohm -25 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) Figure 22. Turn - Off voltage slope dVout/dt(off) (V/ms) 1000 900 800 700 600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 150 175 Figure 23. ILIM vs Tcase Ilimh (A) 10 9 8 7 Vcc= 13V Vcc= 13V Ri= 13Ohm 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) Figure 24. Undervoltage shutdown Vusd (V) 14 Figure 25. STAT_DIS clamp voltage Vsdcl (V) 14 12 10 8 12 I sd= 1mA 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) 18/31 VND5160J-E Electrical specifications Figure 26. High level STAT_DIS voltage Vsdh (V) 8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 150 175 Figure 27. Low level STAT_DIS voltage Vsdl (V) 8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) Tc (C ) 19/31 Application information VND5160J-E 3 Application information Figure 28. Application schematic +5V +5V VCC Rprot STAT_DIS Dld Rprot C OUTPUT Rprot STATUS GND INPUT VGND RGND DGND Note: Channels 2, has the same internal circuit as channel 1. 3.1 3.1.1 GND protection network against reverse battery Solution 1 : resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. 2. RGND 600mV / (IS(on)max). RGND (- CC) / (-IGND) V where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. 20/31 VND5160J-E Application information If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 3.1.2 Solution 2: a diode (DGND) in the ground line A resistor (RGND=1k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift ( 600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection Dld is necessary (Voltage transient suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 180k . Recommended Rprot values is 10k. 3.4 Open load detection in Off state Off state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL 21/31 Application information VND5160J-E Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in standby. The values of VOLmin, VOLmax and IL(off2) are available in the Electrical characteristics section. Figure 29. Open load detection in Off state V batt. VPU VCC RPU INPUT DRIVER + LOGIC OUT + R STATUS VOL RL IL(off2) GROUND 22/31 VND5160J-E Application information 3.5 Maximum demagnetization energy (VCC = 13.5V) Figure 30. Maximum turn Off current versus inductance (for each channel) 10 A B C 1 0,1 0,1 1 L (mH) 10 100 I (A) A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. 23/31 Package and PCB thermal data VND5160J-E 4 4.1 Package and PCB thermal data PowerSSO-12TM thermal data Figure 31. PowerSSO-12TM PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70m (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 32. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON) RTHj_amb(C/W) 65 60 55 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 24/31 VND5160J-E Package and PCB thermal data Figure 33. PowerSSO-12TM Thermal impedance junction ambient single pulse (one channel ON) ZTH (C/W) 100 Footprint 2 cm2 8 cm2 10 1 0,1 0,0001 0,001 0,01 0,1 1 Time (s) 10 100 1000 Pulse calculation formula Z TH =R TH +Z THtp ( 1 - ) where = tP/T Figure 34. Thermal fitting model of a double channel HSD in PowerSSO-12TM(a) a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 25/31 Package and PCB thermal data Table 14. Thermal parameters Footprint 1.2 6 7 10 22 26 0.0008 0.0016 0.05 0.2 0.27 3 0.1 0.8 6 10 15 20 VND5160J-E Area/island (cm2) R1=R7 (C/W) R2=R8 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1=C7 (W.s/C) C2=C8 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) 2 8 9 10 15 0.1 1 9 26/31 VND5160J-E Package and packing information 5 5.1 Package and packing information ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 5.2 PowerSSO-12TM package information Figure 35. PowerSSO-12TM package dimensions 27/31 Package and packing information Table 15. PowerSSO-12TM mechanical data Millimeters Symbol Min. A A1 A2 B C D E e H h L k X Y ddd 5.800 0.250 0.400 0 1.900 3.600 1.250 0.000 1.100 0.230 0.190 4.800 3.800 0.800 VND5160J-E Typ. Max. 1.620 0.100 1.650 0.410 0.250 5.000 4.000 6.200 0.500 1.270 8 2.500 4.200 0.100 28/31 VND5160J-E Package and packing information 5.3 Packing information Figure 36. PowerSSO-12TM tube shipment (no suffix) B C A Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. 100 2000 532 1.85 6.75 0.6 Figure 37. PowerSSO-12TM tape and reel shipment (suffix "TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing All dimensions are in mm. W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets saled with cover tape. User direction of feed 29/31 Revision history VND5160J-E 6 Revision history Table 16. Date 7-Jan-2004 3-Feb-2006 Document revision history Revision 1 2 Initial release. Major series of updates incorporated. Reformatted. Added list of tables and list of figures. Added Section 3.5: Maximum demagnetization energy (VCC = 13.5V). Added new disclaimer. Updated Table 4: Absolute maximum ratings: EMAX entries. Updated Table 13: Electrical transient requirements :Test level values III and IV for test pulse 5b and notes. Figure 34: Thermal fitting model of a double channel HSD in PowerSSO-12TM added note. Updated Section 4.1: PowerSSO-12TM thermal data: - Changed Figure 32: Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). - Changed Figure 33: PowerSSO-12TM Thermal impedance junction ambient single pulse (one channel ON). - Updated Table 14: Thermal parameters: R1 and R7 values changed from 1.2 to 0.1 C/W. R2 = R8 values changed from 6 to 0.2 C/W. R3 value changed from 7 to 4 C/W. R4 values changed from 10/10/9 to 8/8/7 C/W. C1=C7 values changed from 0.0008 to 0.0001 C/W. C2=C8 values changed from 0.0016 to 0.002 C/W. Changes 20-Mar-2007 3 01-Jun-2007 4 17-Dec-2007 5 30/31 VND5160J-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 31/31 |
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